gd32e23x_crc.h 6.0 KB

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  1. /*!
  2. \file gd32e23x_crc.h
  3. \brief definitions for the CRC
  4. \version 2019-02-19, V1.0.0, firmware for GD32E23x
  5. \version 2020-12-12, V1.1.0, firmware for GD32E23x
  6. */
  7. /*
  8. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #ifndef GD32E23X_CRC_H
  31. #define GD32E23X_CRC_H
  32. #include "gd32e23x.h"
  33. /* CRC definitions */
  34. #define CRC CRC_BASE /*!< CRC bsae address */
  35. /* registers definitions */
  36. #define CRC_DATA REG32((CRC) + 0x00000000U) /*!< CRC data register */
  37. #define CRC_FDATA REG32((CRC) + 0x00000004U) /*!< CRC free data register */
  38. #define CRC_CTL REG32((CRC) + 0x00000008U) /*!< CRC control register */
  39. #define CRC_IDATA REG32((CRC) + 0x00000010U) /*!< CRC initialization data register */
  40. #define CRC_POLY REG32((CRC) + 0x00000014U) /*!< CRC polynomial register */
  41. /* bits definitions */
  42. /* CRC_DATA */
  43. #define CRC_DATA_DATA BITS(0,31) /*!< CRC data bits */
  44. /* CRC_FDATA */
  45. #define CRC_FDATA_FDATA BITS(0,7) /*!< CRC free data bits */
  46. /* CRC_CTL */
  47. #define CRC_CTL_RST BIT(0) /*!< CRC reset bit */
  48. #define CRC_CTL_PS BITS(3,4) /*!< size of polynomial function bits */
  49. #define CRC_CTL_REV_I BITS(5,6) /*!< input data reverse function bits */
  50. #define CRC_CTL_REV_O BIT(7) /*!< output data reverse function bit */
  51. /* CRC_INIT */
  52. #define CRC_IDATA_IDATA BITS(0,31) /*!< CRC initialization data bits */
  53. /* CRC_POLY */
  54. #define CRC_POLY_POLY BITS(0,31) /*!< CRC polynomial value bits */
  55. /* constants definitions */
  56. /* size of polynomial function */
  57. #define CTL_PS(regval) (BITS(3, 4) & ((regval) << 3))
  58. #define CRC_CTL_PS_32 CTL_PS(0) /*!< 32-bit polynomial for CRC calculation */
  59. #define CRC_CTL_PS_16 CTL_PS(1) /*!< 16-bit polynomial for CRC calculation */
  60. #define CRC_CTL_PS_8 CTL_PS(2) /*!< 8-bit polynomial for CRC calculation */
  61. #define CRC_CTL_PS_7 CTL_PS(3) /*!< 7-bit polynomial for CRC calculation */
  62. /* input data reverse function */
  63. #define CTL_REV_I(regval) (BITS(5, 6) & ((regval) << 5))
  64. #define CRC_INPUT_DATA_NOT CTL_REV_I(0) /*!< input data not reverse */
  65. #define CRC_INPUT_DATA_BYTE CTL_REV_I(1) /*!< input data reversed by byte type */
  66. #define CRC_INPUT_DATA_HALFWORD CTL_REV_I(2) /*!< input data reversed by half-word type */
  67. #define CRC_INPUT_DATA_WORD CTL_REV_I(3) /*!< input data reversed by word type */
  68. /* input data format */
  69. #define INPUT_FORMAT_WORD 0U /*!< input data in word format */
  70. #define INPUT_FORMAT_HALFWORD 1U /*!< input data in half-word format */
  71. #define INPUT_FORMAT_BYTE 2U /*!< input data in byte format */
  72. /* function declarations */
  73. /* deinit CRC calculation unit */
  74. void crc_deinit(void);
  75. /* enable the reverse operation of output data */
  76. void crc_reverse_output_data_enable(void);
  77. /* disable the reverse operation of output data */
  78. void crc_reverse_output_data_disable(void);
  79. /* reset data register to the value of initialization data register */
  80. void crc_data_register_reset(void);
  81. /* read the data register */
  82. uint32_t crc_data_register_read(void);
  83. /* read the free data register */
  84. uint8_t crc_free_data_register_read(void);
  85. /* write the free data register */
  86. void crc_free_data_register_write(uint8_t free_data);
  87. /* write the initial value register */
  88. void crc_init_data_register_write(uint32_t init_data);
  89. /* configure the CRC input data function */
  90. void crc_input_data_reverse_config(uint32_t data_reverse);
  91. /* configure the CRC size of polynomial function */
  92. void crc_polynomial_size_set(uint32_t poly_size);
  93. /* configure the CRC polynomial value function */
  94. void crc_polynomial_set(uint32_t poly);
  95. /* CRC calculate single data */
  96. uint32_t crc_single_data_calculate(uint32_t sdata, uint8_t data_format);
  97. /* CRC calculate a data array */
  98. uint32_t crc_block_data_calculate(void *array, uint32_t size, uint8_t data_format);
  99. #endif /* GD32E23X_CRC_H */