gd32e23x_rtc.c 35 KB

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  1. /*!
  2. \file gd32e23x_rtc.c
  3. \brief RTC driver
  4. \version 2019-02-19, V1.0.0, firmware for GD32E23X
  5. \version 2020-12-12, V1.1.0, firmware for GD32E23X
  6. */
  7. /*
  8. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "gd32e23x_rtc.h"
  31. /*!
  32. \brief reset most of the RTC registers
  33. \param[in] none
  34. \param[out] none
  35. \retval ErrStatus: ERROR or SUCCESS
  36. */
  37. ErrStatus rtc_deinit(void)
  38. {
  39. ErrStatus error_status = ERROR;
  40. /* RTC_TAMP register is not under write protection */
  41. RTC_TAMP = RTC_REGISTER_RESET;
  42. /* disable the write protection */
  43. RTC_WPK = RTC_UNLOCK_KEY1;
  44. RTC_WPK = RTC_UNLOCK_KEY2;
  45. /* reset RTC_CTL register, this can be done without the init mode */
  46. RTC_CTL &= RTC_REGISTER_RESET;
  47. /* enter init mode */
  48. error_status = rtc_init_mode_enter();
  49. if(ERROR != error_status){
  50. /* before reset RTC_TIME and RTC_DATE, BPSHAD bit in RTC_CTL should be reset as the condition.
  51. in order to read calendar from shadow register, not the real registers being reset */
  52. RTC_TIME = RTC_REGISTER_RESET;
  53. RTC_DATE = RTC_DATE_RESET;
  54. RTC_PSC = RTC_PSC_RESET;
  55. /* reset RTC_STAT register, also exit init mode.
  56. at the same time, RTC_STAT_SOPF bit is reset, as the condition to reset RTC_SHIFTCTL register later */
  57. RTC_STAT = RTC_STAT_RESET;
  58. /* to write RTC_ALRM0SS register, ALRM0EN bit in RTC_CTL register should be reset as the condition */
  59. RTC_ALRM0TD = RTC_REGISTER_RESET;
  60. RTC_ALRM0SS = RTC_REGISTER_RESET;
  61. /* reset RTC_SHIFTCTL and RTC_HRFC register, this can be done without the init mode */
  62. RTC_SHIFTCTL = RTC_REGISTER_RESET;
  63. RTC_HRFC = RTC_REGISTER_RESET;
  64. error_status = rtc_register_sync_wait();
  65. }
  66. /* enable the write protection */
  67. RTC_WPK = RTC_LOCK_KEY;
  68. return error_status;
  69. }
  70. /*!
  71. \brief initialize RTC registers
  72. \param[in] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
  73. parameters for initialization of the rtc peripheral
  74. members of the structure and the member values are shown as below:
  75. rtc_year: 0x0 - 0x99(BCD format)
  76. rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  77. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  78. rtc_date: 0x1 - 0x31(BCD format)
  79. rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
  80. RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
  81. rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
  82. rtc_minute: 0x0 - 0x59(BCD format)
  83. rtc_second: 0x0 - 0x59(BCD format)
  84. rtc_factor_asyn: 0x0 - 0x7F
  85. rtc_factor_syn: 0x0 - 0x7FFF
  86. rtc_am_pm: RTC_AM, RTC_PM
  87. rtc_display_format: RTC_24HOUR, RTC_12HOUR
  88. \param[out] none
  89. \retval ErrStatus: ERROR or SUCCESS
  90. */
  91. ErrStatus rtc_init(rtc_parameter_struct* rtc_initpara_struct)
  92. {
  93. ErrStatus error_status = ERROR;
  94. uint32_t reg_time = 0x00U, reg_date = 0x00U;
  95. reg_date = (DATE_YR(rtc_initpara_struct->rtc_year) | \
  96. DATE_DOW(rtc_initpara_struct->rtc_day_of_week) | \
  97. DATE_MON(rtc_initpara_struct->rtc_month) | \
  98. DATE_DAY(rtc_initpara_struct->rtc_date));
  99. reg_time = (rtc_initpara_struct->rtc_am_pm| \
  100. TIME_HR(rtc_initpara_struct->rtc_hour) | \
  101. TIME_MN(rtc_initpara_struct->rtc_minute) | \
  102. TIME_SC(rtc_initpara_struct->rtc_second));
  103. /* 1st: disable the write protection */
  104. RTC_WPK = RTC_UNLOCK_KEY1;
  105. RTC_WPK = RTC_UNLOCK_KEY2;
  106. /* 2nd: enter init mode */
  107. error_status = rtc_init_mode_enter();
  108. if(ERROR != error_status){
  109. RTC_PSC = (uint32_t)(PSC_FACTOR_A(rtc_initpara_struct->rtc_factor_asyn)| \
  110. PSC_FACTOR_S(rtc_initpara_struct->rtc_factor_syn));
  111. RTC_TIME = (uint32_t)reg_time;
  112. RTC_DATE = (uint32_t)reg_date;
  113. RTC_CTL &= (uint32_t)(~RTC_CTL_CS);
  114. RTC_CTL |= rtc_initpara_struct->rtc_display_format;
  115. /* 3rd: exit init mode */
  116. rtc_init_mode_exit();
  117. /* 4th: wait the RSYNF flag to set */
  118. error_status = rtc_register_sync_wait();
  119. }
  120. /* 5th: enable the write protection */
  121. RTC_WPK = RTC_LOCK_KEY;
  122. return error_status;
  123. }
  124. /*!
  125. \brief enter RTC init mode
  126. \param[in] none
  127. \param[out] none
  128. \retval ErrStatus: ERROR or SUCCESS
  129. */
  130. ErrStatus rtc_init_mode_enter(void)
  131. {
  132. uint32_t time_index = RTC_INITM_TIMEOUT;
  133. uint32_t flag_status = RESET;
  134. ErrStatus error_status = ERROR;
  135. /* check whether it has been in init mode */
  136. if((uint32_t)RESET == (RTC_STAT & RTC_STAT_INITF)){
  137. RTC_STAT |= RTC_STAT_INITM;
  138. /* wait until the INITF flag to be set */
  139. do{
  140. flag_status = RTC_STAT & RTC_STAT_INITF;
  141. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  142. if((uint32_t)RESET != flag_status){
  143. error_status = SUCCESS;
  144. }
  145. }else{
  146. error_status = SUCCESS;
  147. }
  148. return error_status;
  149. }
  150. /*!
  151. \brief exit RTC init mode
  152. \param[in] none
  153. \param[out] none
  154. \retval none
  155. */
  156. void rtc_init_mode_exit(void)
  157. {
  158. RTC_STAT &= (uint32_t)(~RTC_STAT_INITM);
  159. }
  160. /*!
  161. \brief wait until RTC_TIME and RTC_DATE registers are synchronized with APB clock, and the shadow
  162. registers are updated
  163. \param[in] none
  164. \param[out] none
  165. \retval ErrStatus: ERROR or SUCCESS
  166. */
  167. ErrStatus rtc_register_sync_wait(void)
  168. {
  169. volatile uint32_t time_index = RTC_RSYNF_TIMEOUT;
  170. uint32_t flag_status = RESET;
  171. ErrStatus error_status = ERROR;
  172. if((uint32_t)RESET == (RTC_CTL & RTC_CTL_BPSHAD)){
  173. /* disable the write protection */
  174. RTC_WPK = RTC_UNLOCK_KEY1;
  175. RTC_WPK = RTC_UNLOCK_KEY2;
  176. /* firstly clear RSYNF flag */
  177. RTC_STAT &= (uint32_t)(~RTC_STAT_RSYNF);
  178. /* wait until RSYNF flag to be set */
  179. do{
  180. flag_status = RTC_STAT & RTC_STAT_RSYNF;
  181. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  182. if((uint32_t)RESET != flag_status){
  183. error_status = SUCCESS;
  184. }
  185. /* enable the write protection */
  186. RTC_WPK = RTC_LOCK_KEY;
  187. }else{
  188. error_status = SUCCESS;
  189. }
  190. return error_status;
  191. }
  192. /*!
  193. \brief get current time and date
  194. \param[in] none
  195. \param[out] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
  196. parameters for initialization of the rtc peripheral
  197. members of the structure and the member values are shown as below:
  198. rtc_year: 0x0 - 0x99(BCD format)
  199. rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  200. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  201. rtc_date: 0x1 - 0x31(BCD format)
  202. rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
  203. RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
  204. rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
  205. rtc_minute: 0x0 - 0x59(BCD format)
  206. rtc_second: 0x0 - 0x59(BCD format)
  207. rtc_factor_asyn: 0x0 - 0x7F
  208. rtc_factor_syn: 0x0 - 0x7FFF
  209. rtc_am_pm: RTC_AM, RTC_PM
  210. rtc_display_format: RTC_24HOUR, RTC_12HOUR
  211. \retval none
  212. */
  213. void rtc_current_time_get(rtc_parameter_struct* rtc_initpara_struct)
  214. {
  215. uint32_t temp_tr = 0x00U, temp_dr = 0x00U, temp_pscr = 0x00U, temp_ctlr = 0x00U;
  216. temp_tr = (uint32_t)RTC_TIME;
  217. temp_dr = (uint32_t)RTC_DATE;
  218. temp_pscr = (uint32_t)RTC_PSC;
  219. temp_ctlr = (uint32_t)RTC_CTL;
  220. /* get current time and construct rtc_parameter_struct structure */
  221. rtc_initpara_struct->rtc_year = (uint8_t)GET_DATE_YR(temp_dr);
  222. rtc_initpara_struct->rtc_month = (uint8_t)GET_DATE_MON(temp_dr);
  223. rtc_initpara_struct->rtc_date = (uint8_t)GET_DATE_DAY(temp_dr);
  224. rtc_initpara_struct->rtc_day_of_week = (uint8_t)GET_DATE_DOW(temp_dr);
  225. rtc_initpara_struct->rtc_hour = (uint8_t)GET_TIME_HR(temp_tr);
  226. rtc_initpara_struct->rtc_minute = (uint8_t)GET_TIME_MN(temp_tr);
  227. rtc_initpara_struct->rtc_second = (uint8_t)GET_TIME_SC(temp_tr);
  228. rtc_initpara_struct->rtc_factor_asyn = (uint16_t)GET_PSC_FACTOR_A(temp_pscr);
  229. rtc_initpara_struct->rtc_factor_syn = (uint16_t)GET_PSC_FACTOR_S(temp_pscr);
  230. rtc_initpara_struct->rtc_am_pm = (uint32_t)(temp_pscr & RTC_TIME_PM);
  231. rtc_initpara_struct->rtc_display_format = (uint32_t)(temp_ctlr & RTC_CTL_CS);
  232. }
  233. /*!
  234. \brief get current subsecond value
  235. \param[in] none
  236. \param[out] none
  237. \retval current subsecond value
  238. */
  239. uint32_t rtc_subsecond_get(void)
  240. {
  241. uint32_t reg = 0x00U;
  242. /* if BPSHAD bit is reset, reading RTC_SS will lock RTC_TIME and RTC_DATE automatically */
  243. reg = (uint32_t)RTC_SS;
  244. /* read RTC_DATE to unlock the 3 shadow registers */
  245. (void) (RTC_DATE);
  246. return reg;
  247. }
  248. /*!
  249. \brief configure RTC alarm
  250. \param[in] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
  251. parameters for RTC alarm configuration
  252. members of the structure and the member values are shown as below:
  253. rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
  254. RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
  255. rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
  256. rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
  257. 2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  258. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  259. rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  260. rtc_alarm_minute: 0x0 - 0x59(BCD format)
  261. rtc_alarm_second: 0x0 - 0x59(BCD format)
  262. rtc_am_pm: RTC_AM, RTC_PM
  263. \param[out] none
  264. \retval none
  265. */
  266. void rtc_alarm_config(rtc_alarm_struct* rtc_alarm_time)
  267. {
  268. uint32_t reg_alrm0td = 0x00U;
  269. reg_alrm0td = (rtc_alarm_time->rtc_alarm_mask | \
  270. rtc_alarm_time->rtc_weekday_or_date | \
  271. rtc_alarm_time->rtc_am_pm | \
  272. ALRM0TD_DAY(rtc_alarm_time->rtc_alarm_day) | \
  273. ALRM0TD_HR(rtc_alarm_time->rtc_alarm_hour) | \
  274. ALRM0TD_MN(rtc_alarm_time->rtc_alarm_minute) | \
  275. ALRM0TD_SC(rtc_alarm_time->rtc_alarm_second));
  276. /* disable the write protection */
  277. RTC_WPK = RTC_UNLOCK_KEY1;
  278. RTC_WPK = RTC_UNLOCK_KEY2;
  279. RTC_ALRM0TD = (uint32_t)reg_alrm0td;
  280. /* enable the write protection */
  281. RTC_WPK = RTC_LOCK_KEY;
  282. }
  283. /*!
  284. \brief configure subsecond of RTC alarm
  285. \param[in] mask_subsecond: alarm subsecond mask
  286. only one parameter can be selected which is shown as below:
  287. \arg RTC_MASKSSC_0_14: mask alarm subsecond configuration
  288. \arg RTC_MASKSSC_1_14: mask RTC_ALRM0SS_SSC[14:1], and RTC_ALRM0SS_SSC[0] is to be compared
  289. \arg RTC_MASKSSC_2_14: mask RTC_ALRM0SS_SSC[14:2], and RTC_ALRM0SS_SSC[1:0] is to be compared
  290. \arg RTC_MASKSSC_3_14: mask RTC_ALRM0SS_SSC[14:3], and RTC_ALRM0SS_SSC[2:0] is to be compared
  291. \arg RTC_MASKSSC_4_14: mask RTC_ALRM0SS_SSC[14:4], and RTC_ALRM0SS_SSC[3:0] is to be compared
  292. \arg RTC_MASKSSC_5_14: mask RTC_ALRM0SS_SSC[14:5], and RTC_ALRM0SS_SSC[4:0] is to be compared
  293. \arg RTC_MASKSSC_6_14: mask RTC_ALRM0SS_SSC[14:6], and RTC_ALRM0SS_SSC[5:0] is to be compared
  294. \arg RTC_MASKSSC_7_14: mask RTC_ALRM0SS_SSC[14:7], and RTC_ALRM0SS_SSC[6:0] is to be compared
  295. \arg RTC_MASKSSC_8_14: mask RTC_ALRM0SS_SSC[14:8], and RTC_ALRM0SS_SSC[7:0] is to be compared
  296. \arg RTC_MASKSSC_9_14: mask RTC_ALRM0SS_SSC[14:9], and RTC_ALRM0SS_SSC[8:0] is to be compared
  297. \arg RTC_MASKSSC_10_14: mask RTC_ALRM0SS_SSC[14:10], and RTC_ALRM0SS_SSC[9:0] is to be compared
  298. \arg RTC_MASKSSC_11_14: mask RTC_ALRM0SS_SSC[14:11], and RTC_ALRM0SS_SSC[10:0] is to be compared
  299. \arg RTC_MASKSSC_12_14: mask RTC_ALRM0SS_SSC[14:12], and RTC_ALRM0SS_SSC[11:0] is to be compared
  300. \arg RTC_MASKSSC_13_14: mask RTC_ALRM0SS_SSC[14:13], and RTC_ALRM0SS_SSC[12:0] is to be compared
  301. \arg RTC_MASKSSC_14: mask RTC_ALRM0SS_SSC[14], and RTC_ALRM0SS_SSC[13:0] is to be compared
  302. \arg RTC_MASKSSC_NONE: mask none, and RTC_ALRM0SS_SSC[14:0] is to be compared
  303. \param[in] subsecond: alarm subsecond value(0x000 - 0x7FFF)
  304. \param[out] none
  305. \retval none
  306. */
  307. void rtc_alarm_subsecond_config(uint32_t mask_subsecond, uint32_t subsecond)
  308. {
  309. /* disable the write protection */
  310. RTC_WPK = RTC_UNLOCK_KEY1;
  311. RTC_WPK = RTC_UNLOCK_KEY2;
  312. RTC_ALRM0SS = mask_subsecond | subsecond;
  313. /* enable the write protection */
  314. RTC_WPK = RTC_LOCK_KEY;
  315. }
  316. /*!
  317. \brief enable RTC alarm
  318. \param[in] none
  319. \param[out] none
  320. \retval none
  321. */
  322. void rtc_alarm_enable(void)
  323. {
  324. /* disable the write protection */
  325. RTC_WPK = RTC_UNLOCK_KEY1;
  326. RTC_WPK = RTC_UNLOCK_KEY2;
  327. RTC_CTL |= RTC_CTL_ALRM0EN;
  328. /* enable the write protection */
  329. RTC_WPK = RTC_LOCK_KEY;
  330. }
  331. /*!
  332. \brief disable RTC alarm
  333. \param[in] none
  334. \param[out] none
  335. \retval ErrStatus: ERROR or SUCCESS
  336. */
  337. ErrStatus rtc_alarm_disable(void)
  338. {
  339. volatile uint32_t time_index = RTC_ALRM0WF_TIMEOUT;
  340. ErrStatus error_status = ERROR;
  341. uint32_t flag_status = RESET;
  342. /* disable the write protection */
  343. RTC_WPK = RTC_UNLOCK_KEY1;
  344. RTC_WPK = RTC_UNLOCK_KEY2;
  345. /* clear the state of alarm */
  346. RTC_CTL &= (uint32_t)(~RTC_CTL_ALRM0EN);
  347. /* wait until ALRM0WF flag to be set after the alarm is disabled */
  348. do{
  349. flag_status = RTC_STAT & RTC_STAT_ALRM0WF;
  350. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  351. if((uint32_t)RESET != flag_status){
  352. error_status = SUCCESS;
  353. }
  354. /* enable the write protection */
  355. RTC_WPK = RTC_LOCK_KEY;
  356. return error_status;
  357. }
  358. /*!
  359. \brief get RTC alarm
  360. \param[in] none
  361. \param[out] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
  362. parameters for RTC alarm configuration
  363. members of the structure and the member values are shown as below:
  364. rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
  365. RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
  366. rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
  367. rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
  368. 2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  369. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  370. rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  371. rtc_alarm_minute: 0x0 - 0x59(BCD format)
  372. rtc_alarm_second: 0x0 - 0x59(BCD format)
  373. rtc_am_pm: RTC_AM, RTC_PM
  374. \retval none
  375. */
  376. void rtc_alarm_get(rtc_alarm_struct* rtc_alarm_time)
  377. {
  378. uint32_t reg_alrm0td = 0x00U;
  379. /* get the value of RTC_ALRM0TD register */
  380. reg_alrm0td = RTC_ALRM0TD;
  381. /* get alarm parameters and construct the rtc_alarm_struct structure */
  382. rtc_alarm_time->rtc_alarm_mask = reg_alrm0td & RTC_ALARM_ALL_MASK;
  383. rtc_alarm_time->rtc_am_pm = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_PM);
  384. rtc_alarm_time->rtc_weekday_or_date = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_DOWS);
  385. rtc_alarm_time->rtc_alarm_day = (uint8_t)GET_ALRM0TD_DAY(reg_alrm0td);
  386. rtc_alarm_time->rtc_alarm_hour = (uint8_t)GET_ALRM0TD_HR(reg_alrm0td);
  387. rtc_alarm_time->rtc_alarm_minute = (uint8_t)GET_ALRM0TD_MN(reg_alrm0td);
  388. rtc_alarm_time->rtc_alarm_second = (uint8_t)GET_ALRM0TD_SC(reg_alrm0td);
  389. }
  390. /*!
  391. \brief get RTC alarm subsecond
  392. \param[in] none
  393. \param[out] none
  394. \retval RTC alarm subsecond value
  395. */
  396. uint32_t rtc_alarm_subsecond_get(void)
  397. {
  398. return ((uint32_t)(RTC_ALRM0SS & RTC_ALRM0SS_SSC));
  399. }
  400. /*!
  401. \brief enable RTC time-stamp
  402. \param[in] edge: specify which edge to detect of time-stamp
  403. only one parameter can be selected which is shown as below:
  404. \arg RTC_TIMESTAMP_RISING_EDGE: rising edge is valid event edge for timestamp event
  405. \arg RTC_TIMESTAMP_FALLING_EDGE: falling edge is valid event edge for timestamp event
  406. \param[out] none
  407. \retval none
  408. */
  409. void rtc_timestamp_enable(uint32_t edge)
  410. {
  411. uint32_t reg_ctl = 0x00U;
  412. /* clear the bits to be configured in RTC_CTL */
  413. reg_ctl = (uint32_t)(RTC_CTL & (uint32_t)(~(RTC_CTL_TSEG | RTC_CTL_TSEN)));
  414. /* new configuration */
  415. reg_ctl |= (uint32_t)(edge | RTC_CTL_TSEN);
  416. /* disable the write protection */
  417. RTC_WPK = RTC_UNLOCK_KEY1;
  418. RTC_WPK = RTC_UNLOCK_KEY2;
  419. RTC_CTL = (uint32_t)reg_ctl;
  420. /* enable the write protection */
  421. RTC_WPK = RTC_LOCK_KEY;
  422. }
  423. /*!
  424. \brief disable RTC time-stamp
  425. \param[in] none
  426. \param[out] none
  427. \retval none
  428. */
  429. void rtc_timestamp_disable(void)
  430. {
  431. /* disable the write protection */
  432. RTC_WPK = RTC_UNLOCK_KEY1;
  433. RTC_WPK = RTC_UNLOCK_KEY2;
  434. /* clear the TSEN bit */
  435. RTC_CTL &= (uint32_t)(~ RTC_CTL_TSEN);
  436. /* enable the write protection */
  437. RTC_WPK = RTC_LOCK_KEY;
  438. }
  439. /*!
  440. \brief get RTC timestamp time and date
  441. \param[in] none
  442. \param[out] rtc_timestamp: pointer to a rtc_timestamp_struct structure which contains
  443. parameters for RTC time-stamp configuration
  444. members of the structure and the member values are shown as below:
  445. rtc_timestamp_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  446. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  447. rtc_timestamp_date: 0x1 - 0x31(BCD format)
  448. rtc_timestamp_day: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  449. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  450. rtc_timestamp_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  451. rtc_timestamp_minute: 0x0 - 0x59(BCD format)
  452. rtc_timestamp_second: 0x0 - 0x59(BCD format)
  453. rtc_am_pm: RTC_AM, RTC_PM
  454. \retval none
  455. */
  456. void rtc_timestamp_get(rtc_timestamp_struct* rtc_timestamp)
  457. {
  458. uint32_t temp_tts = 0x00U, temp_dts = 0x00U;
  459. /* get the value of time_stamp registers */
  460. temp_tts = (uint32_t)RTC_TTS;
  461. temp_dts = (uint32_t)RTC_DTS;
  462. /* get timestamp time and construct the rtc_timestamp_struct structure */
  463. rtc_timestamp->rtc_am_pm = (uint32_t)(temp_tts & RTC_TTS_PM);
  464. rtc_timestamp->rtc_timestamp_month = (uint8_t)GET_DTS_MON(temp_dts);
  465. rtc_timestamp->rtc_timestamp_date = (uint8_t)GET_DTS_DAY(temp_dts);
  466. rtc_timestamp->rtc_timestamp_day = (uint8_t)GET_DTS_DOW(temp_dts);
  467. rtc_timestamp->rtc_timestamp_hour = (uint8_t)GET_TTS_HR(temp_tts);
  468. rtc_timestamp->rtc_timestamp_minute = (uint8_t)GET_TTS_MN(temp_tts);
  469. rtc_timestamp->rtc_timestamp_second = (uint8_t)GET_TTS_SC(temp_tts);
  470. }
  471. /*!
  472. \brief get RTC time-stamp subsecond
  473. \param[in] none
  474. \param[out] none
  475. \retval RTC time-stamp subsecond value
  476. */
  477. uint32_t rtc_timestamp_subsecond_get(void)
  478. {
  479. return ((uint32_t)RTC_SSTS);
  480. }
  481. /*!
  482. \brief enable RTC tamper
  483. \param[in] rtc_tamper: pointer to a rtc_tamper_struct structure which contains
  484. parameters for RTC tamper configuration
  485. members of the structure and the member values are shown as below:
  486. rtc_tamper_source: RTC_TAMPER0, RTC_TAMPER1
  487. rtc_tamper_trigger: RTC_TAMPER_TRIGGER_EDGE_RISING, RTC_TAMPER_TRIGGER_EDGE_FALLING
  488. RTC_TAMPER_TRIGGER_LEVEL_LOW, RTC_TAMPER_TRIGGER_LEVEL_HIGH
  489. rtc_tamper_filter: RTC_FLT_EDGE, RTC_FLT_2S, RTC_FLT_4S, RTC_FLT_8S
  490. rtc_tamper_sample_frequency: RTC_FREQ_DIV32768, RTC_FREQ_DIV16384, RTC_FREQ_DIV8192,
  491. RTC_FREQ_DIV4096, RTC_FREQ_DIV2048, RTC_FREQ_DIV1024,
  492. RTC_FREQ_DIV512, RTC_FREQ_DIV256
  493. rtc_tamper_precharge_enable: DISABLE, ENABLE
  494. rtc_tamper_precharge_time: RTC_PRCH_1C, RTC_PRCH_2C, RTC_PRCH_4C, RTC_PRCH_8C
  495. rtc_tamper_with_timestamp: DISABLE, ENABLE
  496. \param[out] none
  497. \retval none
  498. */
  499. void rtc_tamper_enable(rtc_tamper_struct* rtc_tamper)
  500. {
  501. /* disable tamper */
  502. RTC_TAMP &= (uint32_t)~(rtc_tamper->rtc_tamper_source);
  503. /* tamper filter must be used when the tamper source is voltage level detection */
  504. RTC_TAMP &= (uint32_t)~RTC_TAMP_FLT;
  505. /* the tamper source is voltage level detection */
  506. if(rtc_tamper->rtc_tamper_filter != RTC_FLT_EDGE ){
  507. RTC_TAMP &= (uint32_t)~(RTC_TAMP_DISPU | RTC_TAMP_PRCH | RTC_TAMP_FREQ | RTC_TAMP_FLT);
  508. /* check if the tamper pin need precharge, if need, then configure the precharge time */
  509. if(DISABLE == rtc_tamper->rtc_tamper_precharge_enable){
  510. RTC_TAMP |= (uint32_t)RTC_TAMP_DISPU;
  511. }else{
  512. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_precharge_time);
  513. }
  514. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_sample_frequency);
  515. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_filter);
  516. }
  517. RTC_TAMP &= (uint32_t)~RTC_TAMP_TPTS;
  518. if(DISABLE != rtc_tamper->rtc_tamper_with_timestamp){
  519. /* the tamper event also cause a time-stamp event */
  520. RTC_TAMP |= (uint32_t)RTC_TAMP_TPTS;
  521. }
  522. /* configure the tamper trigger */
  523. RTC_TAMP &= ((uint32_t)~((rtc_tamper->rtc_tamper_source) << RTC_TAMPER_TRIGGER_POS));
  524. if(RTC_TAMPER_TRIGGER_EDGE_RISING != rtc_tamper->rtc_tamper_trigger){
  525. RTC_TAMP |= (uint32_t)((rtc_tamper->rtc_tamper_source)<< RTC_TAMPER_TRIGGER_POS);
  526. }
  527. /* enable tamper */
  528. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_source);
  529. }
  530. /*!
  531. \brief disable RTC tamper
  532. \param[in] source: specify which tamper source to be disabled
  533. only one parameter can be selected which is shown as below:
  534. \arg RTC_TAMPER0
  535. \arg RTC_TAMPER1
  536. \param[out] none
  537. \retval none
  538. */
  539. void rtc_tamper_disable(uint32_t source)
  540. {
  541. /* disable tamper */
  542. RTC_TAMP &= (uint32_t)~source;
  543. }
  544. /*!
  545. \brief enable specified RTC interrupt
  546. \param[in] interrupt: specify which interrupt source to be enabled
  547. only one parameter can be selected which is shown as below:
  548. \arg RTC_INT_TIMESTAMP: timestamp interrupt, only available for GD32E230
  549. \arg RTC_INT_ALARM: alarm interrupt
  550. \arg RTC_INT_TAMP: tamp interrupt
  551. \param[out] none
  552. \retval none
  553. */
  554. void rtc_interrupt_enable(uint32_t interrupt)
  555. {
  556. /* disable the write protection */
  557. RTC_WPK = RTC_UNLOCK_KEY1;
  558. RTC_WPK = RTC_UNLOCK_KEY2;
  559. /* enable the interrupts in RTC_CTL register */
  560. RTC_CTL |= (uint32_t)(interrupt & (uint32_t)~RTC_TAMP_TPIE);
  561. /* enable the interrupts in RTC_TAMP register */
  562. RTC_TAMP |= (uint32_t)(interrupt & RTC_TAMP_TPIE);
  563. /* enable the write protection */
  564. RTC_WPK = RTC_LOCK_KEY;
  565. }
  566. /*!
  567. \brief disble specified RTC interrupt
  568. \param[in] interrupt: specify which interrupt source to be disabled
  569. only one parameter can be selected which is shown as below:
  570. \arg RTC_INT_TIMESTAMP: timestamp interrupt, only available for GD32E230
  571. \arg RTC_INT_ALARM: alarm interrupt
  572. \arg RTC_INT_TAMP: tamp interrupt
  573. \param[out] none
  574. \retval none
  575. */
  576. void rtc_interrupt_disable(uint32_t interrupt)
  577. {
  578. /* disable the write protection */
  579. RTC_WPK = RTC_UNLOCK_KEY1;
  580. RTC_WPK = RTC_UNLOCK_KEY2;
  581. /* disable the interrupts in RTC_CTL register */
  582. RTC_CTL &= (uint32_t)~(interrupt & (uint32_t)~RTC_TAMP_TPIE);
  583. /* disable the interrupts in RTC_TAMP register */
  584. RTC_TAMP &= (uint32_t)~(interrupt & RTC_TAMP_TPIE);
  585. /* enable the write protection */
  586. RTC_WPK = RTC_LOCK_KEY;
  587. }
  588. /*!
  589. \brief check specified flag
  590. \param[in] flag: specify which flag to check
  591. only one parameter can be selected which is shown as below:
  592. \arg RTC_FLAG_RECALIBRATION: recalibration pending flag
  593. \arg RTC_FLAG_TAMP1: tamper 1 event flag
  594. \arg RTC_FLAG_TAMP0: tamper 0 event flag, only available for GD32E230
  595. \arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag, only available for GD32E230
  596. \arg RTC_FLAG_TIMESTAMP: time-stamp event flag, only available for GD32E230
  597. \arg RTC_FLAG_ALARM0: alarm event flag
  598. \arg RTC_FLAG_INIT: init mode event flag
  599. \arg RTC_FLAG_RSYN: time and date registers synchronized event flag
  600. \arg RTC_FLAG_YCM: year parameter configured event flag
  601. \arg RTC_FLAG_SHIFT: shift operation pending flag
  602. \arg RTC_FLAG_ALARM0_WRITTEN: alarm writen available flag
  603. \param[out] none
  604. \retval FlagStatus: SET or RESET
  605. */
  606. FlagStatus rtc_flag_get(uint32_t flag)
  607. {
  608. FlagStatus flag_state = RESET;
  609. if((uint32_t)RESET != (RTC_STAT & flag)){
  610. flag_state = SET;
  611. }
  612. return flag_state;
  613. }
  614. /*!
  615. \brief clear specified flag
  616. \param[in] flag: specify which flag to clear
  617. only one parameter can be selected which is shown as below:
  618. \arg RTC_FLAG_TAMP1: tamper 1 event flag
  619. \arg RTC_FLAG_TAMP0: tamper 0 event flag, only available for GD32E230
  620. \arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag, only available for GD32E230
  621. \arg RTC_FLAG_TIMESTAMP: time-stamp event flag, only available for GD32E230
  622. \arg RTC_FLAG_ALARM0: alarm event flag
  623. \arg RTC_FLAG_RSYN: time and date registers synchronized event flag
  624. \param[out] none
  625. \retval none
  626. */
  627. void rtc_flag_clear(uint32_t flag)
  628. {
  629. RTC_STAT &= (uint32_t)(~flag);
  630. }
  631. /*!
  632. \brief configure rtc alternate output source
  633. \param[in] source: specify signal to output
  634. only one parameter can be selected which is shown as below:
  635. \arg RTC_CALIBRATION_512HZ: when the LXTAL freqency is 32768Hz and the RTC_PSC
  636. is the default value, output 512Hz signal
  637. \arg RTC_CALIBRATION_1HZ: when the LXTAL freqency is 32768Hz and the RTC_PSC
  638. is the default value, output 512Hz signal
  639. \arg RTC_ALARM_HIGH: when the alarm flag is set, the output pin is high
  640. \arg RTC_ALARM_LOW: when the Alarm flag is set, the output pin is low
  641. \param[in] mode: specify the output pin (PC13) mode when output alarm signal
  642. only one parameter can be selected which is shown as below:
  643. \arg RTC_ALARM_OUTPUT_OD: open drain mode
  644. \arg RTC_ALARM_OUTPUT_PP: push pull mode
  645. \param[out] none
  646. \retval none
  647. */
  648. void rtc_alter_output_config(uint32_t source, uint32_t mode)
  649. {
  650. /* disable the write protection */
  651. RTC_WPK = RTC_UNLOCK_KEY1;
  652. RTC_WPK = RTC_UNLOCK_KEY2;
  653. RTC_CTL &= (uint32_t)~(RTC_CTL_COEN | RTC_CTL_OS | RTC_CTL_OPOL | RTC_CTL_COS);
  654. RTC_CTL |= (uint32_t)(source);
  655. /* alarm output */
  656. if((uint32_t)RESET != (source & RTC_OS_ENABLE)){
  657. RTC_TAMP &= (uint32_t)~(RTC_TAMP_PC13VAL);
  658. RTC_TAMP |= (uint32_t)(mode);
  659. }
  660. /* enable the write protection */
  661. RTC_WPK = RTC_LOCK_KEY;
  662. }
  663. /*!
  664. \brief configure RTC calibration register
  665. \param[in] window: select calibration window
  666. only one parameter can be selected which is shown as below:
  667. \arg RTC_CALIBRATION_WINDOW_32S: 2exp20 RTCCLK cycles, 32s if RTCCLK = 32768 Hz
  668. \arg RTC_CALIBRATION_WINDOW_16S: 2exp19 RTCCLK cycles, 16s if RTCCLK = 32768 Hz
  669. \arg RTC_CALIBRATION_WINDOW_8S: 2exp18 RTCCLK cycles, 8s if RTCCLK = 32768 Hz
  670. \param[in] plus: add RTC clock or not
  671. only one parameter can be selected which is shown as below:
  672. \arg RTC_CALIBRATION_PLUS_SET: add one RTC clock every 2048 rtc clock
  673. \arg RTC_CALIBRATION_PLUS_RESET: no effect
  674. \param[in] minus: the RTC clock to minus during the calibration window(0x0 - 0x1FF)
  675. \param[out] none
  676. \retval ErrStatus: ERROR or SUCCESS
  677. */
  678. ErrStatus rtc_calibration_config(uint32_t window, uint32_t plus, uint32_t minus)
  679. {
  680. uint32_t time_index = RTC_HRFC_TIMEOUT;
  681. ErrStatus error_status = ERROR;
  682. uint32_t flag_status = RESET;
  683. /* disable the write protection */
  684. RTC_WPK = RTC_UNLOCK_KEY1;
  685. RTC_WPK = RTC_UNLOCK_KEY2;
  686. /* check if a calibration operation is ongoing */
  687. do{
  688. flag_status = RTC_STAT & RTC_STAT_SCPF;
  689. }while((--time_index > 0x00U) && ((uint32_t)RESET != flag_status));
  690. if((uint32_t)RESET == flag_status){
  691. RTC_HRFC = (uint32_t)(window | plus | HRFC_CMSK(minus));
  692. error_status = SUCCESS;
  693. }
  694. /* enable the write protection */
  695. RTC_WPK = RTC_LOCK_KEY;
  696. return error_status;
  697. }
  698. /*!
  699. \brief adjust the daylight saving time by adding or substracting one hour from the current time
  700. \param[in] operation: hour ajustment operation
  701. only one parameter can be selected which is shown as below:
  702. \arg RTC_CTL_A1H: add one hour
  703. \arg RTC_CTL_S1H: substract one hour
  704. \param[out] none
  705. \retval none
  706. */
  707. void rtc_hour_adjust(uint32_t operation)
  708. {
  709. /* disable the write protection */
  710. RTC_WPK = RTC_UNLOCK_KEY1;
  711. RTC_WPK = RTC_UNLOCK_KEY2;
  712. RTC_CTL |= (uint32_t)(operation);
  713. /* enable the write protection */
  714. RTC_WPK = RTC_LOCK_KEY;
  715. }
  716. /*!
  717. \brief adjust RTC second or subsecond value of current time
  718. \param[in] add: add 1s to current time or not
  719. only one parameter can be selected which is shown as below:
  720. \arg RTC_SHIFT_ADD1S_RESET: no effect
  721. \arg RTC_SHIFT_ADD1S_SET: add 1s to current time
  722. \param[in] minus: number of subsecond to minus from current time(0x0 - 0x7FFF)
  723. \param[out] none
  724. \retval ErrStatus: ERROR or SUCCESS
  725. */
  726. ErrStatus rtc_second_adjust(uint32_t add, uint32_t minus)
  727. {
  728. uint32_t time_index = RTC_SHIFTCTL_TIMEOUT;
  729. ErrStatus error_status = ERROR;
  730. uint32_t flag_status = RESET;
  731. uint32_t temp=0U;
  732. /* disable the write protection */
  733. RTC_WPK = RTC_UNLOCK_KEY1;
  734. RTC_WPK = RTC_UNLOCK_KEY2;
  735. /* check if a shift operation is ongoing */
  736. do{
  737. flag_status = RTC_STAT & RTC_STAT_SOPF;
  738. }while((--time_index > 0x00U) && ((uint32_t)RESET != flag_status));
  739. temp = RTC_CTL & RTC_CTL_REFEN;
  740. /* check if the function of reference clock detection is disabled */
  741. if(((uint32_t)RESET == flag_status) && (RESET == temp)){
  742. RTC_SHIFTCTL = (uint32_t)(add | SHIFTCTL_SFS(minus));
  743. error_status = rtc_register_sync_wait();
  744. }
  745. /* enable the write protection */
  746. RTC_WPK = RTC_LOCK_KEY;
  747. return error_status;
  748. }
  749. /*!
  750. \brief enable RTC bypass shadow registers function
  751. \param[in] none
  752. \param[out] none
  753. \retval none
  754. */
  755. void rtc_bypass_shadow_enable(void)
  756. {
  757. /* disable the write protection */
  758. RTC_WPK = RTC_UNLOCK_KEY1;
  759. RTC_WPK = RTC_UNLOCK_KEY2;
  760. RTC_CTL |= (uint8_t)RTC_CTL_BPSHAD;
  761. /* enable the write protection */
  762. RTC_WPK = RTC_LOCK_KEY;
  763. }
  764. /*!
  765. \brief disable RTC bypass shadow registers function
  766. \param[in] none
  767. \param[out] none
  768. \retval none
  769. */
  770. void rtc_bypass_shadow_disable(void)
  771. {
  772. /* disable the write protection */
  773. RTC_WPK = RTC_UNLOCK_KEY1;
  774. RTC_WPK = RTC_UNLOCK_KEY2;
  775. RTC_CTL &= (uint8_t)~RTC_CTL_BPSHAD;
  776. /* enable the write protection */
  777. RTC_WPK = RTC_LOCK_KEY;
  778. }
  779. /*!
  780. \brief enable RTC reference clock detection function
  781. \param[in] none
  782. \param[out] none
  783. \retval ErrStatus: ERROR or SUCCESS
  784. */
  785. ErrStatus rtc_refclock_detection_enable(void)
  786. {
  787. ErrStatus error_status = ERROR;
  788. /* disable the write protection */
  789. RTC_WPK = RTC_UNLOCK_KEY1;
  790. RTC_WPK = RTC_UNLOCK_KEY2;
  791. /* enter init mode */
  792. error_status = rtc_init_mode_enter();
  793. if(ERROR != error_status){
  794. RTC_CTL |= (uint32_t)RTC_CTL_REFEN;
  795. /* exit init mode */
  796. rtc_init_mode_exit();
  797. }
  798. /* enable the write protection */
  799. RTC_WPK = RTC_LOCK_KEY;
  800. return error_status;
  801. }
  802. /*!
  803. \brief disable RTC reference clock detection function
  804. \param[in] none
  805. \param[out] none
  806. \retval ErrStatus: ERROR or SUCCESS
  807. */
  808. ErrStatus rtc_refclock_detection_disable(void)
  809. {
  810. ErrStatus error_status = ERROR;
  811. /* disable the write protection */
  812. RTC_WPK = RTC_UNLOCK_KEY1;
  813. RTC_WPK = RTC_UNLOCK_KEY2;
  814. /* enter init mode */
  815. error_status = rtc_init_mode_enter();
  816. if(ERROR != error_status){
  817. RTC_CTL &= (uint32_t)~RTC_CTL_REFEN;
  818. /* exit init mode */
  819. rtc_init_mode_exit();
  820. }
  821. /* enable the write protection */
  822. RTC_WPK = RTC_LOCK_KEY;
  823. return error_status;
  824. }