gd32e23x_misc.c 5.0 KB

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  1. /*!
  2. \file gd32e23x_misc.c
  3. \brief MISC driver
  4. \version 2019-02-19, V1.0.0, firmware for GD32E23x
  5. \version 2020-12-12, V1.1.0, firmware for GD32E23x
  6. */
  7. /*
  8. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "gd32e23x_misc.h"
  31. /*!
  32. \brief enable NVIC request
  33. \param[in] nvic_irq: the NVIC interrupt request, detailed in IRQn_Type
  34. \param[in] nvic_irq_priority: the priority needed to set (0-3)
  35. \param[out] none
  36. \retval none
  37. */
  38. void nvic_irq_enable(uint8_t nvic_irq,
  39. uint8_t nvic_irq_priority)
  40. {
  41. /* set the priority and enable the selected IRQ */
  42. NVIC_SetPriority((IRQn_Type)nvic_irq, (uint32_t)nvic_irq_priority);
  43. NVIC_EnableIRQ((IRQn_Type)nvic_irq);
  44. }
  45. /*!
  46. \brief disable NVIC request
  47. \param[in] nvic_irq: the NVIC interrupt request, detailed in IRQn_Type
  48. \param[out] none
  49. \retval none
  50. */
  51. void nvic_irq_disable(uint8_t nvic_irq)
  52. {
  53. /* disable the selected IRQ.*/
  54. NVIC_DisableIRQ((IRQn_Type)nvic_irq);
  55. }
  56. /* */
  57. /*!
  58. \brief initiates a system reset request to reset the MCU
  59. \param[in] none
  60. \param[out] none
  61. \retval none
  62. */
  63. void nvic_system_reset(void)
  64. {
  65. NVIC_SystemReset();
  66. }
  67. /*!
  68. \brief set the NVIC vector table base address
  69. \param[in] nvic_vict_tab: the RAM or FLASH base address
  70. \arg NVIC_VECTTAB_RAM: RAM base address
  71. \arg NVIC_VECTTAB_FLASH: Flash base address
  72. \param[in] offset: Vector Table offset
  73. \param[out] none
  74. \retval none
  75. */
  76. void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset)
  77. {
  78. SCB->VTOR = nvic_vict_tab | (offset & NVIC_VECTTAB_OFFSET_MASK);
  79. __DSB();
  80. }
  81. /*!
  82. \brief set the state of the low power mode
  83. \param[in] lowpower_mode: the low power mode state
  84. \arg SCB_LPM_SLEEP_EXIT_ISR: if chose this para, the system always enter low power
  85. mode by exiting from ISR
  86. \arg SCB_LPM_DEEPSLEEP: if chose this para, the system will enter the DEEPSLEEP mode
  87. \arg SCB_LPM_WAKE_BY_ALL_INT: if chose this para, the lowpower mode can be woke up
  88. by all the enable and disable interrupts
  89. \param[out] none
  90. \retval none
  91. */
  92. void system_lowpower_set(uint8_t lowpower_mode)
  93. {
  94. SCB->SCR |= (uint32_t)lowpower_mode;
  95. }
  96. /*!
  97. \brief reset the state of the low power mode
  98. \param[in] lowpower_mode: the low power mode state
  99. \arg SCB_LPM_SLEEP_EXIT_ISR: if chose this para, the system will exit low power
  100. mode by exiting from ISR
  101. \arg SCB_LPM_DEEPSLEEP: if chose this para, the system will enter the SLEEP mode
  102. \arg SCB_LPM_WAKE_BY_ALL_INT: if chose this para, the lowpower mode only can be
  103. woke up by the enable interrupts
  104. \param[out] none
  105. \retval none
  106. */
  107. void system_lowpower_reset(uint8_t lowpower_mode)
  108. {
  109. SCB->SCR &= (~(uint32_t)lowpower_mode);
  110. }
  111. /*!
  112. \brief set the systick clock source
  113. \param[in] systick_clksource: the systick clock source needed to choose
  114. \arg SYSTICK_CLKSOURCE_HCLK: systick clock source is from HCLK
  115. \arg SYSTICK_CLKSOURCE_HCLK_DIV8: systick clock source is from HCLK/8
  116. \param[out] none
  117. \retval none
  118. */
  119. void systick_clksource_set(uint32_t systick_clksource)
  120. {
  121. if(SYSTICK_CLKSOURCE_HCLK == systick_clksource ){
  122. /* set the systick clock source from HCLK */
  123. SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
  124. }else{
  125. /* set the systick clock source from HCLK/8 */
  126. SysTick->CTRL &= SYSTICK_CLKSOURCE_HCLK_DIV8;
  127. }
  128. }